BMAS

2000

BMAS Techical Program, 19-20 October 2000

The papers and presentations available from this webpage are subject to copyright regulations set by the IEEE.

Plenary Session

Keynote

Experience of a Recent Convert to Behavioral Modeling
A. Abidi ― University of California, Los Angeles, USA

Session 1: Mixed-Signal Modeling

Modeling and simulation of a Sigma-Delta digital to analog converter using VHDL-AMS (paper 50KB, presentation 100KB)
M. Vogels, B. De Smedt, G. Gielen ― Katholieke Universiteit Leuven, Belgium

Event-Driven Electrothermal Modeling of Mixed-Signal Circuits (paper 170KB, presentation 600KB)
X. Huang, A. Mantooth ― University of Arkansas, USA

High-level design case of a switched-capacitor low-pass filter using Verilog-A (paper 50KB, presentation 210KB)
E. Lauwers, K. Lampaert, P. Miliozzi, G. Gielen Katholieke Universiteit Leuven, Belgium, Conexant Systems, USA

Modeling and Simulating Semiconductor Devices using VHDL-AMS (paper 230KB)
V. Kasulasrinivas, H. Carter ― University of Cincinnati, USA

Session 2: Mixed-Technology Modeling

Integration of Mechanical CAD and VHDL-AMS Behavioral Modeling (paper 110KB, presentation 2.8B)
R. Sinha, Ch. Paredis, P. Khosla ― Carnegie Mellon University, USA

Table-Based Time-Domain Simulation of Oversampled Discrete-Time Electro-mechanical Systems (paper 40KB)
J. Wu, L. Richard Carley ― Carnegie Mellon University, USA

Combining Models of Physical Effects for Describing Complex Electromechanical Devices (paper 210KB, presentation 450KB)
L. Vosskaemper, R. Schmid, G. Pelz ― Dolphin Integration GmbH, Germany

Session 3: Mixed-Level Simulation / Mixed-Domain Modeling

Mixed-Domain and Reduced-Order Modeling of Electroosmotic Transport in Bio-MEMS (paper 180KB)
N. Aluru, R. Qiao University of Illinois at Urbana-Champaign, USA

Characterization, simulation and modeling of PLL under irradiation with HDL-A (paper 110KB, presentation 880KB)
I. Martínez, P. Delatte, G. Berger, D. Flandre Université catholique de Louvain, Belgium

Design and optimization of optical links based on VHDL-AMS modeling (paper 240KB)
F. Mieyeville, P. Bontoux, I. O'Connor, F. Gaffiot Ecole centrale de Lyon, France

Session 4: Simulation Techniques

VHDL Based Simulation of a Sigma-Delta A/D Converter (paper 240KB, presentation 140KB)
M. Schubert Fachhochschule Regensburg, Germany

On Accommodating Particular Analog System Models With VHDL (paper 230KB, presentation 900KB)
G. Popescu Technical University of Iasi, Romania

Dynamic Time-Step Control Algorithm Enhancements (paper 210KB, presentation 410KB)
J. Bach Delphi Delco Electronics Systems, USA

An Open VHDL-AMS Simulation Framework (paper 160KB, presentation 2MB)
J. Mades, Th. Schneider, A. Windisch, M. Glesner Infineon Technologies AG, Germany

Session 5: Modeling and Simulation Issues

Neural Network Design for Behavioral Model Generation with Shape Preserving Properties (paper 470KB, presentation 340KB)
O. Mikulchenko, K. Mayaram Oregon State University, USA

Verilog-AMS: Mixed-Signal Simulation and Cross Domain Connection Modules (paper 50KB)
P. Frey, D. O'Riordan Cadence Design Systems, USA

Towards a Specification Notation for High-Level Synthesis of Mixed-signal and Analog Systems (paper 60KB)
A. Doboli, R. Vemuri University of Cincinnati, USA

Session 6: Verilog-AMS

Tutorial

Tutorial on Verilog-A/MS
D. O'Riordan Cadence Design Systems, USA

Contact the webmaster

Last updated on Monday, July 04, 2011

Analog Verification Analog Design
Created and hosted by:


Search www.bmas-conf.orgSearch the web