BMAS 2004 Techical Program, 21-22 October 2004

Ken Kundert, General Chair; Colin McAndrew, Program Chair

Thursday, October 21

Plenary Session
Host: Ken Kundert, Cadence Design Systems


Raising Modeling to a New Low (presentation)
Ted Vucurevich CTO, Cadence Design Systems

Session 1: Applications of Behavioral Modeling
Host: Ron Vogelsong, Cadence Design Systems

Applications of Behavioral Modeling and Simulation on Lab-on-a-Chip: Micro-Mixer and Separation System (paper, presentation)
Y. Wang, Q. Lin, and T. Mukherjee ― Carnegie Mellon University, Pittsburgh, PA

Modeling Thermal Induced Inter-Symbol Interference of Feedback DACs in Delta-Sigma Modulators (paper, presentation)
R. Shringarpure, T. Kaplan, G. Valley*, P. Petre, and J. Visher ― HRL LLC, Malibu, CA, *The Aerospace Corporation, El Segundo, CA

Modeling of a Piezoelectric Device with Shocks Management Using VHDL-AMS (paper, presentation)
S. Guessab and J. Oudinot* ― Supelec, Plateau de Moulon, France, *Mentor Graphics, Meudon La Foret, France

Behavioral Modeling and Simulation of Jitter and Phase Noise in Fractional-N PLL Frequency Synthesizer (paper, presentation)
X. Mao, H. Yang, and H. Wang ― Tsinghua University, Beijing, PRC

Behavioral Simulation of Biological Neuron Systems in SystemC (paper, presentation)
S. Modi, P. Wilson, A. Brown, and J. Chad ― University of Southampton, UK

Session 2: Design Observations and Methodologies for Modeling
Host: Al Davis, Kettering University


Behavioral Modeling in Industrial IC Design; Experiences and Observations (paper, presentation)
I. Miller and A. Ferreira-Noullet ― Freescale Semiconductor

A Methodology for Analog Circuit Macromodeling (paper, presentation)
R. Batra, P. Li, L. Pileggi, and Y.-T. Chien* ― Carnegie Mellon University, Pittsburgh, PA, *Industrial Tech. Research Inst., Taiwan

Architectural and Parametric Optimization of Low-Pass RF Analog Filters in VHDL-AMS Based High-Level Synthesis (paper, presentation)
T. Kazmierski and F. Hamid ― University of Southampton, UK

Efficient Functional Verification for Mixed Signal IP (paper, presentation)
J. David ― Cadence Design Systems, San Jose, CA

Session 3: Posters
Host: Karti Mayaram, Oregon State University

Modeling and Simulation of Metal-Semiconductor-Metal Photodetector using VHDL-AMS (paper, presentation)
S. Wu and S.-M. Kang ― University of Califorrnia, Santa Cruz, CA

VHDL-AMS Model of a VCSEL Emission Module with Thermal Effects (paper, presentation)
M. Karray, J.-J. Charlot, P. Desgreys, and M. Pez* ― ENST, Paris, France, *D-Lightsys, Orsay, France

Passivity-Based Sample Selection and Adaptive Vector Fitting Algorithm for Pole-Residue Modeling of Sparse Frequency-Domain Data (paper, presentation)
D. Deschrijver and T. Dhaene ― University of Antwerp, Belgium

Mixed-Signal Simulation by way of the Simbus Backplane (paper, presentation)
D. Martin, P. Wilsey, R. Hoekstra*, E. Keiter*, S. Hutchinson*, and T. Russo* ― Clifton Labs, Cincinnati, OH, *Sandia National Labs, Albuquerque, NM

Modeling and Simulation of a Wireless Sensor Data Acquisition System using PCM Algorithms (paper, presentation)
K. Arshak, E. Jafer, D. McDonagh* ― University of Limerick, Ireland, *Toumaz Technology Ltd., Oxfordshire, UK

A Synchronization Algorithm for VHDL-AMS Simulation with ADA Feedback Effect (paper, presentation)
H. Ghasemi and Z. Navabi ― University of Tehran, Iran

Synthesis of CCs and CFOAs by Manipulation of VFs and CFs (paper, presentation)
L. Torres-Papaqui and E. Tlelo-Cuautle ― INAOE, Puebla, Mexico

Friday, October 22

Plenary Session
Host: Colin McAndrew, Freescale Semiconductor


A Personal Perspective on Parameterized and Nonlinear Model Order Reduction (presentation)
Jacob White ― MIT, Cambridge, MA

Session 4: Model Compilers and Compact Modeling
Host: Jim Barby, University of Waterloo


How to (and How Not to) Write a Compact Model in Verilog-A (paper, presentation)
Geoffrey Coram, Analog Devices, Wilmington, MA


Automatic Generation of Compact Semiconductor Device Models using Paragon and ADMS (paper, presentation)
A. Mantooth, V. Chaudhary, M. Francis, and L. Lemaitre* University of Arkansas, AR, *Freescale Semiconductor, Geneva, Switzerland

Design-Adaptive Device Modeling in Model Compiler for Efficient and Accurate Circuit Simulation (paper, presentation)
B. Wan, E. Acar*, S. Nassif*, and R. Shi University of Washington, Seattle, WA, *IBM Austin Research Center, TX

Panel Discussion
Organizer: Colin McAndrew, Freescale Semiconductor

What is the Real Impact of Behavioral Modeling and Simulation on IC Design?
Ira Miller ― Freescale Semiconductor (presentation)
Jim Holmes ― Texas Instruments
Jacob White ― MIT (presentation)
Henry Chang ― Mentor Graphics
Henry Chang ― Cadence Design Systems

Session 5: Behavioral Modeling and Simulation for RF and Data Converters
Host: Peter Wilson, University of Southampton

VHDL-AMS Modeling and Simulation of a pi/4 DQPSK Transceiver System (paper, presentation)
E. Normark, L. Yang, C. Wakayama, P. Nikitin, and R. Shi University of Washington, Seattle, WA

A High-Level VHDL-AMS Model Design Methodology for an Analog RF LNA and Mixer (paper, presentation)
W. Yang, H. Carter, and J. Yan University of Cincinnati, OH

Use of Symbolic Performance Models in Layout Inclusive RF Low Noise Amplifier Synthesis (paper, presentation)
M. Ranjan, A. Bhaduri, W. Verhaegen*, B. Mukherjee**, R. Vemuri, G. Gielen*, and A. Pacelli** University of Cincinnati, OH, *KUL, Leuven, Belgium, **SUNY Stony Brook, NY

Behavioral Simulator of Analog-to-Digital Converters for Telecommunications Applications (paper, presentation)
G. Zareba and O. Palusinski University of Arizona, Tuscon, AZ

Fast Time-Domain Simulation Through Combined Symbolic Analysis and PWL Modeling (paper, presentation)
H. Zhang and A. Doboli Stony Brook University, NY

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